A low power, low chip area decimation filter for Σ - Δ modulator for flywheel MEMS gyro realized in the CMOS 180 nm technology

The paper presents a low power and low chip area decimation filter for a 15-bits Σ-Δ analog-to-digital converter (ADC) designed for a flywheel MEMS gyroscope. In contrary to typical solutions, in which decimation is performed after each filtering stage, in the proposed approach all filter sections operate at the sampling frequency of the modulator. The low power dissipation is in this case achieved by substantially simpler structure of particular stages. By selecting the oversampling ratio (OSR) of the modulator sufficiently large, e.g. 200, the decimation filter composed of Finite Impulse Response (FIR) filters with equal coefficients does not distort the passband signal. The low chip area results from eliminating a complex selective filter usually placed at the end of the filtering chain in the decimation filter.


Published in:
28th International Conference on Microelectronics Proceedings, 411-414
Presented at:
28th International Conference on Microelectronics (MIEL 2012), Nis, Serbia, May 13-16, 2012
Year:
2012
Publisher:
New York, IEEE
ISBN:
978-1-4673-0238-8
Keywords:
Laboratories:




 Record created 2013-02-25, last modified 2018-03-17


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