A 0.24-nJ/bit Super-Regenerative Pulsed UWB Receiver in 0.18-mu m CMOS
This paper describes a receiver system design for impulse-radio ultra-wideband (IR-UWB) that operates at two carrier frequencies-3.494 and 3.993 GHz-with a 10-Mbps data rate. To reduce the power consumption of the front-end amplifiers, a super-regenerative architecture is used. An integrated circuit, implemented in a CMOS 0.18-mu m technology and operating with a 1.5-V power supply, exhibits energy consumption of 0.24 nJ/bit with a measured sensitivity of -66 and -61 dBm at 3.494 and 3.993 GHz, respectively, with a BER of 10(-3). Also included on the integrated circuit is an automatic tuning circuit based on a digital phase-locked loop that is used to set the resonant frequency of the super-regenerative block.
Keywords: Digital phase-locked loop ; oscillator ; receiver architecture ; super-regenerative system ; ultra-wideband communication ; wireless sensor network ; Wireless Sensor Networks ; Transmitter ; Transceiver ; Radio ; Pll
Record created on 2011-12-16, modified on 2016-08-09