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research article
Ultrafast Clock Recovery and Sampling by Single Parametric Device
We propose and demonstrate a new architecture that combines clock recovery and signal processing functions in a single fiber device. By using parasitic cross-phase modulation of idler wave generated within the parametric sampling gate, rate-variable self-synchronized demultiplexing was demonstrated. Rigorous measurements confirm stable, high sensitivity performance at a maximal rate of 640 Gb/s, even when the input signal is subject to a rapid transient.
Type
research article
Authors
Publication date
2011
Published in
Volume
23
Issue
3
Start page
191
End page
193
Peer reviewed
REVIEWED
EPFL units
Available on Infoscience
December 12, 2011
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