Monolithic integration of Si nanowires with metallic electrodes: NEMS resonator and switch applications

• Published in: Journal of Micromechanics and Microengineering (ISSN: 0960-1317)
• Institute of Physics, 2011

The challenge of wafer-scale integration of silicon nanowires into microsystems is addressed by developing a fabrication approach that utilizes a combination of Bosch-process-based nanowire fabrication with surface micromachining and chemical-mechanical-polishing-based metal electrode/contact formation. Nanowires up to a length of 50 mu m are achieved while retaining submicron nanowire-to-electrode gaps. The scalability of the technique is demonstrated through using no patterning method other than optical lithography on conventional SOI substrates. Structural integrity of double-clamped nanowires is evaluated through a three-point bending test, where good clamping quality and fracture strengths approaching the theoretical strength of the material are observed. Resulting devices are characterized in resonator and switch applications-two areas of interest for CMOS-compatible solutions-with all-electrical actuation and readout schemes. Improvements and tuning of obtained performance parameters such as resonance frequency, quality factor and pull-in voltage are simply a question of conventional design and process adjustments. Implications of the proposed technique are far-reaching including system-level integration of either single-nanowire devices within thick Si layers or nanowire arrays perpendicular to the plane of the substrate.

Keywords: Stress-Limited Oxidation ; Single-Crystal Silicon ; Nanomechanical Resonators ; Cmos Process ; Fabrication ; Devices ; Growth ; Temperature ; Technology ; Substrate

Reference

• EPFL-ARTICLE-170331
• doi:10.1088/0960-1317/21/12/125018
• View record in Web of Science

Record created on 2011-11-23, modified on 2017-05-10