Electrical modeling and design of a wafer-level package for MEM resonators
This paper presents the electrical design and characterization of a wafer-level, or 0-level, package for micro-electromechanical resonators. We start by identifying the requirements on the electrical parasitics of a packaged resonator, derived from an analysis of the oscillator circuit comprising the resonator. Then, using the deduced requirements as a starting point, an optimized design of the package is developed in a two-step procedure. First, initial choices for the package topology are made on the basis of intuitive and physical circuit models. Second, a more detailed analysis is carried out by means of full-wave simulations and circuit models extractions. Measured results on empty packages are presented, validating both circuit models and full-wave simulation results. Finally, the parasitics values obtained are discussed in the light of the implementation of an oscillator circuit, demonstrating the possibility to implement functioning oscillators based on the proposed package.
Keywords: 0-Level package ; electrical parasitics ; microelectromechanical (MEM) resonator ; micro-electromechanical system (MEMS) ; packaging ; wafer-level package ; Crystal-Oscillator ; Technologies ; Microsystems ; Microwave ; Silicon ; Cmos
Record created on 2011-06-21, modified on 2016-08-09