Programmable code processor for software defined radio
This paper describes a flexible processor capable of producing binary codes for various standards such as UNITS and 802.11b. Its field of application lies in base-stations and in future software defined radio terminals. Because of its flexibility just one or two instances may be integrated into a SoC (System on Chip) where multiple codes are needed. This approach adds flexibility compared to a dedicated code generating structure where the class of codes is fixed. Specialized Bit-ALUs allow to address multiple bits of a register and to operate simultaneously on them. Instructions tailored for code generation enhance its efficiency considerably. The processor was successfully integrated and tested in a 0.25mum 5ML CMOS process.
Cite this item
Bischoff, R., Biveroni, J., Bruehwiler, M., Burg, A., Felber, N., Fichtner, W., & Perels, D. (2003). Programmable code processor for software defined radio. Conference Record of the Thirty-Seventh Asilomar Conference on Signals, Systems & Computers, 2, 2156–2160. https://doi.org/10.1109/ACSSC.2003.1292362
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WOS:000189498700406
2003
0-7803-8104-1
2
2156
2160
REVIEWED
EPFL
| Event name | Event place | Event date |
Pacific Grove, CA | Nov 09-12, 2003 | |