Die-Level TSV Fabrication Platform for CMOS-MEMS Integration

This paper reports a new post-CMOS processing platform for die-level through-silicon-via (TSV) fabrication, based on wafer reconstitution from embedded dies, parylene deposition, stencil lithography, and bottom-up electroplating. The goal of this work is to develop a heterogeneous 3D-integration technique for the applications requiring CMOS-MEMS integration with vertical interconnections.


Published in:
Proceedings of the 16th International Conference on Solid-State Sensors, Actuators and Microsystems (Transducers 2011), 1799-1802
Presented at:
The 16th International Conference on Solid-State Sensors, Actuators and Microsystems, Beijing, China, June 5-9, 2011
Year:
2011
Laboratories:




 Record created 2011-03-21, last modified 2018-03-18

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