Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub-binary radix M/2(+)M DAC, which has the advantage of allowing reaching arbitrarily high resolutions at the cost of extremely small area. The methodology proposed allows the removal of any type of imperfections, at the expense of two shift registers, a few logical gates and a DAC which is smaller than the shift register.


Publié dans:
Mixdes 2009: Proceedings Of The 16Th International Conference Mixed Design Of Integrated Circuits And Systems, 456-461
Présenté à:
16th International Conference Mixed Design of Integrated Circuits and Systems, Lodz, POLAND, Jun 25-27, 2009
Année
2009
Publisher:
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
Mots-clefs:
Autres identifiants:
Laboratoires:




 Notice créée le 2010-11-30, modifiée le 2019-08-12


Évaluer ce document:

Rate this document:
1
2
3
 
(Pas encore évalué)