A High–Performance Parallel Implementation of the Chambolle Algorithm

The determination of the optical flow is a central problem in image processing, as it allows to describe how an image changes over time by means of a numerical vector field. The estimation of the optical flow is however a very complex problem, which has been faced using many different mathematical approaches. A large body of work has been recently published about variational methods, following the technique for total variation minimization proposed by Chambolle. Still, their hardware implementations do not offer good performances in terms of frames that can be processed per time unit, mainly because of the complex dependency scheme among the data. In this work, we propose a highly parallel and accelerated FPGA implementation of the Chambolle algorithm, which splits the original image into a set of overlapping sub-frames and efficiently exploits the reuse of intermediate results. We validate our hardware on large frames (up to 1024 × 768), and the proposed approach largely outperforms the state-of-the-art implementations, reaching up to 76× speedups as well as realtime frame rates even at high resolutions.

Published in:
Proceedings of the IEEE/ACM 2011 Design, Automation and Test in Europe Conference (DATE 2011), 1, 1, 1436-1441
Presented at:
IEEE/ACM 2011 Design, Automation and Test in Europe Conference (DATE 2011), Grenoble, France, March 14-18, 2011
New York, ACM and IEEE Press

 Record created 2010-11-05, last modified 2018-09-13

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