Loading...
conference paper
Smart Power IC simulation of substrate coupled current due to majority and minority carriers transports
2010
2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010
This paper presents a new approach for substrate parasitic current simulation in smart power integrated circuit. A new compact modeling approach developed in previous work has been used to create an equivalent substrate schematic. The latter is composed of new components having the peculiarity not to fully recombine minority carrier at their boundary. By the interconnection of these special components in the electrical design, the effect of substrate current is simulated. Having this information early in the design phase will allow design optimization and reduce the risk of costly chip redesign.
Type
conference paper
Authors
Publication date
2010
Published in
2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010
Start page
168
End page
171
Peer reviewed
NON-REVIEWED
Available on Infoscience
November 4, 2010
Use this identifier to reference this record