Abstract

This paper presents the design flow from system-level specifications to transistor-level design for three different fully-differential amplifiers composing the first and the second integrator of a second-order hybrid multi-bit ΔΣ modulator. The circuit-level specifications for each amplifier are extracted using behavioral models and timedomain system-level simulations with a SNDR target value of 93 dB ± 2 dB. The amplifiers are designed using the structured analog design methodology consisting of circuit partitioning into basic analog blocks, specification derivation for each basic block, and transistor sizing in a specific design sequence. Transistor-level design is based on the choice of the inversion factor and the transistor length to achieve the required specifications of each block. After all three analog amplifiers are sized, the system-level performance is confirmed by time-domain simulations, and the obtained SNDR value is within the specified range. Copyright © 2007 by Department of Microelectronics & Computer Science, Technical University of Lodz.

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