This paper presents a detailed analysis of CSL (Current Steering Logic) [1] and compares its characteristics with FSCL (Folded Source Coupled Logic) [1,2,3], two logic families intended to be applied in mixed-mode CMOS circuits. These logic families generate small current spikes compared to the CMOS static family. They feature high robustness to process fluctuations, and are capable to operate at low quiescent current and power supply voltage. Simulation results, based on ES2 0.7 CMOS low voltage technology, are presented.