Run-Time Adaptable On-Chip Predictive Thermal Triggers

With ever-increasing power densities, Dynamic Thermal Management (DTM) techniques have become mainstream in today’s systems. An important component of such techniques is the thermal trigger. It has been shown that predictive thermal triggers can outperform reactive ones. In this paper, we present a novel trade-off space of predictive thermal triggers, and identify run-time adaptability as a crucial parameter of interest. We identify the Neural Network (NN) simulator presented in [14] to have some key advantages over other predictive thermal triggers. We extend it to work for an arbitrary sensor layout configuration and to be run-time adaptable. We present experimental results on Niagara UltraSPARC T1 chip with real-life benchmark applications. Our results validate our proposed extension of the NN simulator. Our results also quantitatively establish the effectiveness of the proposed simulator for reducing, the otherwise unacceptably high errors, that can arise due to expected leakage current variation and design-time thermal modelling errors.


Published in:
Proceedings of the 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 1, 5, 255 - 260
Presented at:
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), Yokohama, Japan, January 25-28, 2011
Year:
2011
Publisher:
New York, ACM and IEEE Press
ISBN:
978-1-4244-7516-2
Keywords:
Laboratories:




 Record created 2010-09-25, last modified 2018-03-17

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