High Data Rate RFID Tag/Reader Architecture Using Wireless Voltage Regulation
This paper discusses a novel tag/reader system, based on the passive, far-field RFID principle, with megabits per second read capability at operating ranges of several centimeters. The system operates in the ISM band at 2.45 GHz. A maximum data rate of 4 Mbps was demonstrated, at a tag/reader distance of 5.5 cm. The tag is entirely realized in a standard CMOS process for minimum costs. The described system also uses wireless voltage regulation, an innovative technique that allows to improve the overall efficiency of wireless power transmission and to save power on reader side. According to the measurement results, it is shown that the efficiency was improved by a factor larger than four in the best case. ©2008 IEEE.
Keywords: CMOS process;ISM band;frequency 2.45 GHz;high data rate RFID tag-reader architecture;wireless power transmission;wireless voltage regulation;CMOS integrated circuits;low-power electronics;radiofrequency identification;radiofrequency integrated circuits;
Record created on 2010-05-21, modified on 2016-08-08