Design methodology for CMOS distributed amplifiers

The design of distributed amplifiers in a CMOS process is investigated. In particular, the impact of parasitic elements from the transistors and from interstage inductors is studied. A methodology for determining an optimum design, including the number of stages, without needing a complete inductor model at the outset, is presented. This proposed methodology reduces the time and complexity of a distributed amplifier design while at the same time allowing the designer to gain more insight into the circuit's behavior. ©2008 IEEE.


Published in:
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on, 728 -731
Year:
2008
Keywords:
Other identifiers:
Scopus: 2-s2.0-51749107473
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 Record created 2010-05-21, last modified 2018-03-17


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