Design methodology for CMOS distributed amplifiers
The design of distributed amplifiers in a CMOS process is investigated. In particular, the impact of parasitic elements from the transistors and from interstage inductors is studied. A methodology for determining an optimum design, including the number of stages, without needing a complete inductor model at the outset, is presented. This proposed methodology reduces the time and complexity of a distributed amplifier design while at the same time allowing the designer to gain more insight into the circuit's behavior. ©2008 IEEE.
Keywords: CMOS distributed amplifiers;circuit behavior;distributed amplifier design;transistors;CMOS analogue integrated circuits;computational complexity;distributed amplifiers;integrated circuit design;
Record created on 2010-05-21, modified on 2016-08-08