Lukasiewicz Fuzzy Logic Networks and Their Ultra Low Power Hardware Implementation

• Presented at: 12th European Symposium on Artificial Neural Networks (ESANN), Bruges, Belgium, April 28-30, 2009
• Published in: Proceedings of the 12th European Symposium on Artificial Neural Networks (ESANN), p. 275-280
• Publication date: 2009

In this paper, we propose a new category of current-mode Łukasiewicz OR and AND logic neurons and logic networks and show their ultra low power realization. The introduced circuits can operate with very low input signals that set up the operating point of transistors in the subthreshold region. In this region, the mismatch between transistors has much stronger impact on the current mirror gain than in the strong inversion region. The proposed solution minimizes this problem by reducing the number of current mirrors between the input and output of the neuron to only one.

Reference

• EPFL-CONF-148387

Record created on 2010-04-19, modified on 2017-05-10