Fault-Tolerance and Reliability of Post-CMOS Systems: a Circuit Perspective
The reliability of systems made of unreliable nanoelectronic devices is discussed in this paper. Massive defect density which may affect future fabrication technologies calls for novel solutions, where spatial redundancy and the voting scheme play a significant role. The averaging and thresholding voting mechanism that was used in CMOS technologies is presented in the context of nanodevices, based on SET circuits. Theoretical developments supported by numerical simulations show that the presented voter and circuit architecture are also applicable in nanoelectronic design, and are superior to classical voters.
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Record created on 2009-11-19, modified on 2016-08-08