Fault-Tolerance and Reliability of Post-CMOS Systems: a Circuit Perspective

The reliability of systems made of unreliable nanoelectronic devices is discussed in this paper. Massive defect density which may affect future fabrication technologies calls for novel solutions, where spatial redundancy and the voting scheme play a significant role. The averaging and thresholding voting mechanism that was used in CMOS technologies is presented in the context of nanodevices, based on SET circuits. Theoretical developments supported by numerical simulations show that the presented voter and circuit architecture are also applicable in nanoelectronic design, and are superior to classical voters.


Published in:
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
Presented at:
International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), Kanazawa, Japan, December 6-8, 2009
Year:
2009
Publisher:
IEEE Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
Laboratories:




 Record created 2009-11-19, last modified 2018-03-17


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