3D Nanostructured Silicon Relying on Hard Mask Engineering for High Temperature Annealing (HME-HTA) Processes for Electronic Devices

Annealing silicon at high temperatures in hydrogen ambiance has been reported to induce surface diffusion of silicon; in these conditions, adapted 2D arrays of trenches etched in Bulk Si are transformed into buried cavities creating suspended membranes. A 3D nanostructuration of silicon through hard mask engineering and high temperature annealing in hydrogen ambiance is reported. By using a nitride-oxide hard mask stack instead of a sacrificial oxide hard mask for a free surface (maskless) annealing, we open new technological and design possibilities using 2D arrays of various geometry trenches. Implications and potential device applications are discussed.

Published in:
NSTI Nanotech, The Nanotechnology Conference and Trade Show, 2008

 Record created 2009-07-15, last modified 2018-03-17

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