MPSoC Design using Application-Specific Architecturally Visible Communication

This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide high-throughput communication for streaming applications. Producer/consumer relationships map poorly onto cache-based MPSoCs. Instead, we instantiate application specific AVC buffers on top of a distributed consistent and coherent cache-based system with shared main memory to provide the desired functionality. Using JPEG compression as a case study, we show that the use of AVC buffers in conjunction with parallel execution via heterogeneous software pipelining provides a speedup of as much as 4.2x compared to a baseline single processor system, with an increase in estimated memory energy consumption of only 1.6x. Additionally, we describe a method to integrate the AVC buffers into the L1 cache coherence protocol; this allows the runtime system to guarantee memory safety and coherence in situations where the parallelization of the application may be unsafe due to pointers that could not be resolved at compile time.

Published in:
High Performance Embedded Architectures And Compilers, Proceedings, 5409, 183-197
Presented at:
4th International Conference on High Performance Embedded Architectures and Compilers, Paphos, CYPRUS, Jan 25-28, 2009
New York, Springer-Verlag

 Record created 2009-07-13, last modified 2018-03-18

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