A Low-Noise Single-Photon Detector Implemented in a 130 nm CMOS Imaging Process

We report on a new single-photon avalanche diode (SPAD) fabricated in a 130 nm CMOS imaging process. A novel circular structure combining shallow trench isolation (STI) and a passivation implant creates an effective guard ring against premature edge breakdown. Thanks to this guard ring, unprecedented levels of miniaturization may be achieved at no cost of added noise, decreased sensitivity, or timing resolution. The detector, integrated along with quenching and readout electronics, was fully characterized. A second batch of detectors with decreased n-well doping was fabricated, thus reducing the dark count rate (DCR) by several orders of magnitude. To the best of our knowledge, the DCR per unit area achieved in these devices is the lowest ever reported in deep sub-micron CMOS SPADs. Optical measurements show the effectiveness of the guard ring and the high degree of electric field planarity across the sensitive region of the detector. With a photon detection probability (PDP) of up to 36% and a timing jitter of 125 ps at full-width-half-maximum, this SPAD is well-suited for applications such as 3D imaging, fluorescence lifetime imaging, and biophotonics.

Published in:
Solid-State Electronics, 53, 7, 803-808

 Record created 2009-07-13, last modified 2018-12-03

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