Abstract

Reliable split C(V) measurements are shown to be feasible on ultra-thin oxides (down to 1.2 nm) by using relatively small area MOSFETs (typically 100 mum(2)). To this end, specific correction procedures for parasitic parallel capacitances and gate leakage impact on source-drain current characteristics are proposed. The amplitude of the effective mobility is found to be degraded significantly with oxide scaling. Moreover, the mobility attenuation at high field associated to the surface roughness remains unchanged with oxide thickness reduction. This mobility degradation could find its origin in enhanced remote coulomb or interface plasmon-phonon scattering processes, which are reinforced by oxide thinning. (C) 2003 Published by Elsevier Science Ltd.

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