Efficient System-Level Prototyping of Power-Aware Dynamic Memory Managers for Embedded Systems

In the near future, portable embedded devices must run multimedia and wireless network applications with enormous computational performance (1-40GOPS) requirements at a low energy consumption (0.1–2 W). In these applications, the dynamic memory subsystem is currently one of the main sources of power consumption and its inappropriate management can severely affect the performance of the whole system. Within this context, the construction and power evaluation of custom memory managers is one of the most difficult parts for an efficient mapping of such dynamic applications on low-power embedded systems. In this paper, we present a new system-level approach to model complex dynamic memory managers integrating detailed power profiling information. This approach allows to obtain power consumption estimates, memory footprint and memory access values to refine the dynamic memory management of the system in an early stage of the design flow and to easily explore the large search space of memory manager implementations.

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Integration-The VLSI journal, 39, 2, 113-130

 Record created 2008-11-13, last modified 2018-01-28

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