Standard analog design procedure is usually based on a large number of simulations, strongly depends on the type of analog circuit that has to be implemented and requires a lot of manipulation at the transistor level. Simulators offer accurate modeling and precise calculations, but on the other hand ascertaining circuit parameter dependences is difficult and depends on analog designer expertise and knowledge. Moreover, with CMOS technology improvements, the complexity of analog design tasks further increases, since the design specifications become more severe in terms of gain and speed, requiring at the same time minimization of the circuit surface. In this thesis, we propose a structured design approach that allowed us to simplify complex analog design problems and develop a global design strategy that can be used for the design of different analog cells. The basic concept consists in analog cell partitioning into the basic analog structures and sizing of these basic analog structures in a predefined procedural design sequence. The basic analog structure specifications are derived from circuit-level requirements, and its sizing in the environment imposed by the circuit demands less effort. Furthermore, the procedural design sequence ensures the correct propagation of design specifications, the verification of parameter limits and the local optimization loops. The transistor-level design procedure is based on the continuous MOS modeling approach and relies on the device inversion level as a fundamental design variable. Since all important design parameters can be expressed as continuous functions of the device inversion level, the design optimum as well as the technology limits can be easily found. Finally, the proposed design procedure is implemented as a CAD tool that guides and assists the user during analog design tasks and provides an interactive interface that allows instantaneous visualization of design trade-offs. At the same time, the user has a great degree of freedom in decision making which enables high human interactivity and design optimization.