A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor
2006
Details
Title
A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor
Author(s)
Chauhan, Y. S. ; Anghel, C. ; Krummenacher, F. ; Gillon, R. ; Baguenier, A. ; Desoete, B. ; Frere, S. ; Ionescu, A. M. ; Declercq, M.
Published in
IEEE International Symposium on Quality Electronic Design, ISQED 2006
Date
2006
Other identifier(s)
View record in Web of Science
Laboratories
NANOLAB
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > NANOLAB - Nanoelectronic Devices Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date
2007-05-16