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The Nanostencil technique is an emerging nanopatterning method based on shadow mask evaporation. Micro and sub-micron apertures (down to 100-nm scale) are patterned in 100-500 nm thick low-stress silicon nitride membranes. The membrane is brought in close proximity to a substrate and metal is shadow evaporated through the apertures on to a desired substrate. This technique has been successfully applied on full range-wafers, with micro- and nano-apertures in the same device. In this presentation we will give an introduction to the technique, the latest improvements achieved by in LMIS and the potential applications for Nanoelectronics and CMOS technology.