Nanostencil-based lithography for silicon nanowires fabrication
We propose a novel lithography method based on local deposition through miniature shadow-masks (nanostencils) for the fabrication of silicon based nanoelectronics devices. The method allows patterning of sub 100nm scale metal structures in a reproducible way that can subsequently be transferred into silicon by dry etching, and further reduced by controlled oxidation. The stencil technique allows rapid prototyping experiments as well as large area high-throughput nanopatterning. The process is not using photoresist-based processing and is therefore inherently clean and contamination-free and can be readily combined with CMOS technology.
Record created on 2007-02-08, modified on 2016-08-08