A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework

With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor System-On-Chip (MPSoC) architectures have become widespread. These new systems are very complex to design as they must execute multiple complex real-time applications (e.g. video processing, or videogames), while meeting several additional design constraints (e.g. energy consumption or time-to-market). Therefore, mechanisms to efficiently explore the different possible HW-SW design interactions in complete MPSoC systems are in great need. In this paper, we present a new FPGA-based emulation framework that allows designers to rapidly explore a large range of MPSoC design alternatives at the cycle-accurate level. Our results show that the proposed framework is able to extract a number of critical statistics from processing cores, memory and interconnection systems, with a speed-up of three orders of magnitude compared to cycle accurate MPSoC simulators.


Published in:
Proceedings of 14th Annual IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) VLSI-SoC, 140-145
Presented at:
14th Annual IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Nice, France, October 16-18, 2006
Year:
2006
ISBN:
3-901882-19-7
Laboratories:




 Record created 2007-02-06, last modified 2018-03-18

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