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  4. Analytical Modeling of the Suspended-Gate FET and Design Insights for Digital Logic
 
conference paper

Analytical Modeling of the Suspended-Gate FET and Design Insights for Digital Logic

Akarvardar, K.
•
Eggimann, C.
•
Tsamados, D.
Show more
2007
2007 65th Annual Device Research Conference
2007 65th Annual Device Research Conference
  • Details
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Type
conference paper
DOI
10.1109/DRC.2007.4373670
Author(s)
Akarvardar, K.
•
Eggimann, C.
•
Tsamados, D.
•
Chauhan, Y.
•
Wan, G. C.
•
Ionescu, A. M.  
•
Wong, H. S.-P.
Date Issued

2007

Publisher

IEEE

Published in
2007 65th Annual Device Research Conference
Start page

103

End page

104

Editorial or Peer reviewed

NON-REVIEWED

Written at

EPFL

EPFL units
NANOLAB  
Event nameEvent placeEvent date
2007 65th Annual Device Research Conference

South Bend, IN, USA

18-20 06 2007

Available on Infoscience
November 8, 2010
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/57257
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