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  4. Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices
 
conference paper

Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices

O'Connor, Ian
•
Cantan, Mayeul
•
Marchand, Cedric
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January 1, 2018
Proceedings Of The 2018 26Th Ifip/Ieee International Conference On Very Large Scale Integration (Vlsi-Soc)
26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

Edge computing requires highly energy efficient microprocessor units with embedded non-volatile memories to process data at IoT sensor nodes. Ferroelectric non-volatile memory devices are fast, low power and high endurance, and could greatly enhance energy-efficiency and allow flexibility for finer grain logic and memory. This paper will describe the basics of ferroelectric devices for both hysteretic (non-volatile memory) and negative capacitance (steep slope switch) devices, and then project how these can be used in low-power logic cell architectures and fine-grain logic-in-memory (LiM) circuits.

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Type
conference paper
DOI
10.1109/VLSI-SoC.2018.8644809
Web of Science ID

WOS:000462970000038

Author(s)
O'Connor, Ian
Cantan, Mayeul
Marchand, Cedric
Vilquin, Bertrand
Slesazeck, Stefan
Breyer, Evelyn T.
Mulaosmanovic, Halid
Mikolajick, Thomas
Giraud, Bastien
Noel, Jean-Philippe
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Date Issued

2018-01-01

Publisher

IEEE

Publisher place

New York

Published in
Proceedings Of The 2018 26Th Ifip/Ieee International Conference On Very Large Scale Integration (Vlsi-Soc)
ISBN of the book

978-1-5386-4756-1

Series title/Series vol.

IEEE-IFIP International Conference on VLSI and System-on-Chip

Start page

180

End page

183

Subjects

Engineering, Electrical & Electronic

•

Engineering

•

ferroelectric devices

•

non-volatile memory

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steep slope switch

•

low-power logic

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logic-in-memory

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
NANOLAB  
Event nameEvent placeEvent date
26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

Verona, ITALY

Oct 08-10, 2018

Available on Infoscience
June 18, 2019
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/157971
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