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  4. Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch
 
conference paper

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch

Moselund, K. E.  
•
Pott, V.  
•
Bouvet, D.  
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2008
VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on

This work reports for the first time on a cascadable NMOS inverter based on punch-through impact ionization MOSFET (PIMOS) integrated on a single body-tied silicon wire. The PIMOS device acts as a single-transistor-latch and shows abrupt current switching (3-10 mV/dec.) as well as hysteresis in both $I_D(V_{DS})$ and $I_D(V_{GS})$. An inverter gain as high as -80 and a 300 mV hysteresis width in the transfer characteristics are reported at room temperature. Temperature stability of the devices up to 125degC and operation for more than $10^4$ cycles without significant degradation are demonstrated, much beyond the performances of previously reported I-MOS device.

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Type
conference paper
DOI
10.1109/VTSA.2008.4530780
Web of Science ID

WOS:000256564900009

Author(s)
Moselund, K. E.  
Pott, V.  
Bouvet, D.  
Ionescu, A. M.  
Date Issued

2008

Published in
VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on
Start page

22

End page

23

Subjects

MIS devices

•

MOSFET

•

invertors

•

PIMOS device

•

hysteretic inverter-on-a-body-tied-wire

•

punch-through impact ionization MOSFET

•

single-transistor-latch

Editorial or Peer reviewed

REVIEWED

Written at

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July 15, 2009
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/41342
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