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  4. Meshing strategy of equivalent substrate schematic in SMART power IC
 
conference paper

Meshing strategy of equivalent substrate schematic in SMART power IC

Lo Conte, Fabrizio  
•
Sallese, Jean-Michel  
•
Kayal, Maher  
2011
2011 IEEE International Symposium of Circuits and Systems (ISCAS)
2011 IEEE International Symposium on Circuits and Systems (ISCAS)

In this paper, a modeling methodology able to create an equivalent schematic of an High-Voltage integrated circuit is developed. The equivalent schematic is based on enhanced model of diodes and resistances, accounting for minority and majority carrier propagation at their boundary. In this work, the methodology to interconnect these elements in order to be able to model multi-dimensional current path is developed and applied to an industrial H-Bridge architecture. The coupled parasitic currents obtained with the equivalent schematic are compared against measurements and confirm that the model is accurate and can be used to estimate substrate parasitic signals. © 2011 IEEE.

  • Details
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Type
conference paper
DOI
10.1109/ISCAS.2011.5937692
Web of Science ID

WOS:000297265301015

Author(s)
Lo Conte, Fabrizio  
Sallese, Jean-Michel  
Kayal, Maher  
Date Issued

2011

Publisher

IEEE

Published in
2011 IEEE International Symposium of Circuits and Systems (ISCAS)
ISBN of the book

978-142449473-6

Series title/Series vol.

IEEE International Symposium on Circuits and Systems

Start page

821

End page

824

Subjects

Current paths

•

H-bridges

•

High-voltages

•

Majority carriers

•

Meshing strategies

•

Modeling methodology

•

Parasitic current

•

Parasitic signals

•

Smart power IC

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
GR-KA  
EDLAB  
Event nameEvent placeEvent date
2011 IEEE International Symposium on Circuits and Systems (ISCAS)

Rio de Janeiro, Brazil

15-18 05 2011

Available on Infoscience
November 7, 2011
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/72304
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