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research article

Electrical modeling and design of a wafer-level package for MEM resonators

Perruisseau-Carrier, J.  
•
Mazza, M.  
•
Jourdain, A.
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2010
IEEE Transactions on Advanced Packaging

This paper presents the electrical design and characterization of a wafer-level, or 0-level, package for micro-electromechanical resonators. We start by identifying the requirements on the electrical parasitics of a packaged resonator, derived from an analysis of the oscillator circuit comprising the resonator. Then, using the deduced requirements as a starting point, an optimized design of the package is developed in a two-step procedure. First, initial choices for the package topology are made on the basis of intuitive and physical circuit models. Second, a more detailed analysis is carried out by means of full-wave simulations and circuit models extractions. Measured results on empty packages are presented, validating both circuit models and full-wave simulation results. Finally, the parasitics values obtained are discussed in the light of the implementation of an oscillator circuit, demonstrating the possibility to implement functioning oscillators based on the proposed package.

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Type
research article
DOI
10.1109/TADVP.2010.2043101
Web of Science ID

WOS:000277343200027

Author(s)
Perruisseau-Carrier, J.  
Mazza, M.  
Jourdain, A.
Skrivervik, A. K.  
Ionescu, A. M.  
Tilmans, H. A. C.
Date Issued

2010

Publisher

Institute of Electrical and Electronics Engineers

Published in
IEEE Transactions on Advanced Packaging
Volume

33

Issue

2

Start page

534

End page

542

Subjects

0-Level package

•

electrical parasitics

•

microelectromechanical (MEM) resonator

•

micro-electromechanical system (MEMS)

•

packaging

•

wafer-level package

•

Crystal-Oscillator

•

Technologies

•

Microsystems

•

Microwave

•

Silicon

•

Cmos

Editorial or Peer reviewed

REVIEWED

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Available on Infoscience
June 21, 2011
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/68865
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