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Sacchetto, D., Xie, S., Savu, A. V., Zervas, M., De Micheli, G., Brugger, J., & Leblebici, Y. (2011). Vertically-Stacked Si Nanowire FETs with sub-micrometer Gate-All-Around polysilicon gates patterned by nanostencil lithography. Proceedings of the 37th International Conference on Micro and Nano Engineering (MNE). 37th International Conference on Micro and Nano Engineering (MNE), Berlin, Germany. https://infoscience.epfl.ch/handle/20.500.14299/69840

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