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  4. Single field effect transistor capacitor-less memory device and method of operating the same
 
patent

Single field effect transistor capacitor-less memory device and method of operating the same

Biswas, Arnab  
•
Dagtekin, Nilay
•
Ionescu, Mihai Adrian  
2016

A single field effect transistor capacitor-less memory device, and method of operating the same, including a drain region, a source region, an intrinsic channel region between the drain region and the source region forming the single field effect transistor and a base. The device further includes a fin structure comprising the source region, the intrinsic channel and the drain region, the fin structure extending outwardly from the base, and a double gate comprising a first gate connected to a first exposed lateral face of the intrinsic channel region for transistor control, and a second gate connected to a second exposed lateral face of the intrinsic channel region to generate a potential well for storing mobile charge carriers permitting memory operation, the first gate and the second gate being asymmetric for asymmetric electrostatic control of the device.

  • Details
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Type
patent
EPO Family ID

53400994

Author(s)
Biswas, Arnab  
Dagtekin, Nilay
Ionescu, Mihai Adrian  
Subjects

Tunnel FET

•

capacitorless DRAM

Note

Alternative title(s) : (en) Method device and operation method of said device

TTO classification

TTO:6.1308

EPFL units
NANOLAB  
AVP-R-TTO  
DOICountry codeKind codeDate issued

US9508854

US

B2

2016-11-29

US2015179800

US

A1

2015-06-25

Available on Infoscience
July 19, 2016
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/128027
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