The fabrication of high-performance solid-state silicon quantum-devices requires high resolution patterning with minimal substrate damage. We have fabricated room temperature (RT) single-electron transistors (SETs) based on point-contact tunnel junctions using a hybrid lithography tool capable of both high resolution thermal scanning probe lithography and high throughput direct laser writing. The best focal z-position and the offset of the tip- and the laser-writing positions were determined in situ with the scanning probe. We demonstrate <100 nm precision in the registration between the high resolution and high throughput lithographies. The SET devices were fabricated on degenerately doped n-type >10^20/cm^3 silicon on insulator chips using a CMOS compatible geometric oxidation process. The characteristics of the three devices investigated were dominated by the presence of Si nanocrystals or phosphorous atoms embedded within the SiO2, forming quantum dots (QDs). The small size and strong localisation of electrons on the QDs facilitated SET operation even at RT. Temperature measurements showed that in the range 300 K > T > ~100 K, the current flow was thermally activated but at <100 K, it was dominated by tunnelling.