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  4. Multi-Gate FD-SOI Single Electron Transistor for hybrid SET-MOSFET quantum computing
 
conference paper

Multi-Gate FD-SOI Single Electron Transistor for hybrid SET-MOSFET quantum computing

Bersano, Fabio  
•
De Palma, Franco  
•
Oppliger, Fabian  
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January 1, 2022
Esscirc 2022- Ieee 48Th European Solid State Circuits Conference (Esscirc)
48th IEEE European Solid State Circuits Conference (ESSCIRC)

In this work we explore the fabrication and experimental characterization of multi-gate FD-SOI devices that can operate both as single electron transistors (SETs) and MOSFETs. FD-SOI SET operation is achieved with electrostatically induced tunneling barriers controllable by two barrier gates (B-L and B-R) and a front gate (FG), the device operation being additionally tunable by a bottom gate (BG). Coulomb blockade current measurements at 10 mK and 4 K demonstrate the possibility of a dynamic transition from a FD-SOI MOSFET and SET operation, making this technology suitable for hybrid SET-MOSFET low power cryogenic circuits for quantum information processing. Room temperature back-gate characterization has been performed on ultra-thin film devices proving the effective reduction of charge noise for a specific bias configuration. This experimental work is a step forward towards low noise planar FD-SOI quantum dots based devices with tunable electrostatic control.

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ESSDERC2022_Bersano_Open_Access.pdf

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http://purl.org/coar/version/c_970fb48d4fbd8a85

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