Fabricating 3-D pattern with nanoscale resolution is still a challenge for conventional lithography technique based on planar processes. T-SPL is an emerging direct patterning method that utilizes a heated cantilever with a very sharp tip that raster scans the surface of a thermal sensitive resist. The tip locally removes the resist material pixel by pixel matching the position and the depth of a given bitmap source image, with 10 nm lateral and 1 nm vertical resolution, but a limited depth of 100 nm. The objective of this project is the fabrication of sinusoidal patterns on silicon oxide and silicon nitride, overcoming the limited depth with amplification,through a 2 steps process. We first pattern the resist surface with t-SPL, then transfer and amplification are achieved with a dry etching process (RIE). We aim at obtaining a 8 times amplified sine pattern maintaining a good shape and surface roughness. We mainly focus on optimizing the critical parameters in reactive ion etching through several iterations. Fine tuning the chamber pressure, the RF source power and the processing time is of paramount importance for a successfull transfer. A 5 time amplification was reached with a good shape transfer with only minor defects. We reached up to 9 times amplification, though the shape was slightly distorted. In all cases surface roughness is linearly following the amplification, it is then a limiting factor for the process that need to be further addressed. The distortion could also be investigated and reduced changing the starting design.