This paper highlights some of the challenges faced in the modeling of MOSFET devices operating at cryogenic temperature (CT). It will review the most important phenomena, including the saturation of the subthreshold swing (S S) below a critical temperature with its complex current composition, the increase of the threshold voltage, the self-heating effect, and finally the noise. Many circuits used for quantum computers and running at CT operate at RF. It is, therefore, important to understand how the MOSFET DC model can be extended to RF. Finally, we will show how the Gm/ ID figure-of-merit (FoM) can help in designing Cryo-CMOS circuits when no compact models are available. All the presented models are backed up with experimental data acquired on devices from various advanced bulk, FDSOI, and FinFET CMOS technologies.