A 69 µm2 Sub-nW/kHz Capacitor-less Ring Oscillator for Ultra-Miniaturized Implants
This paper presents an ultra-miniaturized, ultra-low-power, capacitor-less CMOS ring oscillator based on dynamic leakage suppression technique. Measurement results demonstrated an oscillation frequency of 21.89 kHz and a power consumption of 7.9 nW for a supply voltage of 0.4 V. The circuit occupies 69 µm2 in 180 nm CMOS process. The line sensitivity was measured at 37%/V with a temperature variation of 15349 ppm/◦C. The stability analysis showed a central frequency of 21.89 kHz with a standard deviation of 10.92 Hz. The circuit exhibits the lowest area consumption and supply voltage among the state-of-the-art. It also favors transistor down-scaling, being suitable for miniaturized and wirelessly powered biomedical implants.
2-s2.0-85202437848
École Polytechnique Fédérale de Lausanne
École Polytechnique Fédérale de Lausanne
École Polytechnique Fédérale de Lausanne
2024
9798350385427
REVIEWED
EPFL
Event name | Event acronym | Event place | Event date |
Sofia, Bulgaria | 2024-06-26 - 2024-06-28 | ||