Programmable Logic Gates Based On Tunable Multistable Mechanisms
Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on modifiable boundary conditions as defined and analyzed in our previous work. The logical state of a PMM is defined by its stability and logical operations are implemented by modifying the stability behavior of the mechanism.
Our programmable logic device has two qualitatively different sets of inputs. The first set determines the logic function to be computed. The second set represents the logical inputs. The output is a single logical value, "true" if the mechanism changes state and "false" otherwise. In this way, we are able to mechanically implement a set of binary logical operations.
This implementation is validated using an analytical model characterizing the qualitative stability behavior of the mechanism. This was further verified using finite element analysis and experimental demonstration.
Cite this item
Zanaty, M., Schneegans, H., Vardi, I., & Henein, S. (2020, January 1). Programmable Logic Gates Based On Tunable Multistable Mechanisms. Proceedings of the Asme International Design Engineering Technical Conferences and Computers and Information in Engineering Conference, 2019, Vol 5A. ASME International Design Engineering Technical Conferences / Computers and Information in Engineering Conference, Anaheim, CA. https://doi.org/10.1115/DETC2019-97647
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WOS:000519154700007
2020-01-01
New York
978-0-7918-5923-0
V05AT07A007
REVIEWED
EPFL
| Event name | Event place | Event date |
Anaheim, CA | Aug 18-21, 2019 | |