Repository logo

Infoscience

  • English
  • French
Log In
Logo EPFL, École polytechnique fédérale de Lausanne

Infoscience

  • English
  • French
Log In
  1. Home
  2. Academic and Research Output
  3. Conferences, Workshops, Symposiums, and Seminars
  4. TURNUS: A design exploration framework for dataflow system design
 
conference paper

TURNUS: A design exploration framework for dataflow system design

Casale Brunet, Simone  
•
Mattavelli, Marco  
•
Janneck, Jorn W.
2013
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)
2013 IEEE International Symposium on Circuits and Systems (ISCAS)

While research on the design of heterogeneous concurrent systems has a long and rich history, a unified design methodology and tool support has not emerged so far, and thus the creation of such systems remains a difficult, time-consuming and error-prone process. The absence of principled support for system evaluation and optimization at high abstraction levels makes the quality of the resulting implementation highly dependent on the experience or prejudices of the designer. This is particularly critical when the combinatorial explosion of design parameters overwhelms available optimization tools. In this work we address these matters by presenting a unified design exploration framework suitable for a wide range of different target platforms. The design is unified and implemented at high level by using a standard dataflow language, while the target platform is described using the IP-XACT standard. This facilitates different design space heuristics that guide the designer during validation and optimization stages without requiring low-level implementations of parts of the application. Our framework currently yields exploration and optimization results in terms of application throughput and buffer size dimensioning, although other co-exploration and optimization heuristics are available.

  • Details
  • Metrics
Type
conference paper
DOI
10.1109/ISCAS.2013.6571927
Author(s)
Casale Brunet, Simone  
Mattavelli, Marco  
Janneck, Jorn W.
Date Issued

2013

Publisher

IEEE

Published in
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)
Start page

654

End page

654

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
SCI-STI-MM  
Event nameEvent placeEvent date
2013 IEEE International Symposium on Circuits and Systems (ISCAS)

Beijing, China

19-23 05 2013

Available on Infoscience
September 30, 2013
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/95042
Logo EPFL, École polytechnique fédérale de Lausanne
  • Contact
  • infoscience@epfl.ch

  • Follow us on Facebook
  • Follow us on Instagram
  • Follow us on LinkedIn
  • Follow us on X
  • Follow us on Youtube
AccessibilityLegal noticePrivacy policyCookie settingsEnd User AgreementGet helpFeedback

Infoscience is a service managed and provided by the Library and IT Services of EPFL. © EPFL, tous droits réservés