An FPGA-based Accelerator for Rapid Simulation of SC Decoding of Polar Codes

conference paper

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•

2015

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)

Name

PID3958617.pdf

Type

Preprint

Version

Submitted version (Preprint)

Access type

openaccess

Size

337.87 KB

Format

Adobe PDF

Checksum (MD5)

96c06a4d2b410641d3cd84ba6b0af838