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conference paper
Tunneling path impact on semi-classical numerical simulations of TFET devices
2011
Ulis 2011 Ultimate Integration on Silicon
In this work a non-local band-to-band tunnelling model has been implemented into a full-band Monte Carlo simulator. Two different approaches for the choice of the tunnelling path have been implemented and their impact on the transfer characteristics of different Tunnel FET structures is investigated. In both the SOI and the DG TFET architectures we have simulated, up to 1 order of magnitude of underestimation in the current and up to 15% of difference in the value of the Subthreshold Slope can be found according to the choice of the tunnelling path. © 2011 IEEE.
Type
conference paper
Authors
Publication date
2011
Publisher
Published in
Ulis 2011 Ultimate Integration on Silicon
Start page
1
End page
4
Peer reviewed
REVIEWED
Written at
EPFL
EPFL units
| Event name | Event place | Event date |
Cork, Ireland | 14-16 03 2011 | |
Available on Infoscience
January 19, 2012
Use this identifier to reference this record