Quantum computing is expected to complement classical von-Neumann architectures in solving problems beyond the reach of conventional digital machines. This new model of computation leverages the rich complexity of many-body quantum systems to perform computations in a space that scales exponentially with the number of quantum bits without incurring an exponential cost in resources such as time, space, or energy. Over the past decade, remarkable experimental progress in quantum processing units has been made possible through the convergence of advances in information theory, quantum physics, materials science, and electrical engineering. Current research is actively benchmarking various platforms to implement scalable quantum architectures with high fidelity operation, aiming to integrate an increasing number of interconnected qubits on a single platform. This thesis investigates technological advancements in semiconductor spin qubits, with a focus on silicon-based quantum device architectures leveraging fully-depleted silicon-on-insulator (FD-SOI) technology. Emphasis is placed on quantum confinement, spin qubit design, and fabrication techniques that enable a compact device integration. Theoretical foundations are provided through an overview of quantum confinement in nanostructures and its application to single-electron transistors (SETs) and spin qubits. Key qubit types based on semiconductor quantum dots including Lossâ DiVincenzo, singletâ triplet, and exchange-only configurations are discussed. Electric-dipole spin resonance (EDSR) is presented as a method for operating single-qubit gates with high frequency and fidelity. Our experimental work explores advanced fabrication strategies for thin and ultra-thin SOI substrates, optimized for reproducibility and scalability. The successful realization of multi-gate FD-SOI SETs, demonstrating Coulomb oscillations at 4K and 10mK, confirms the compatibility of these devices with standard CMOS processes and supports the development of SETâ MOS hybrid circuits for both digital and analog applications. A novel back-gating approach, based on the so-called "Nanomole" fabrication process is introduced to achieve implantation-free dual-gate control at cryogenic temperatures. This method enhances electrostatic tunability and supports symmetric gating in FET devices at millikelvin temperatures. Simulations reveal that back-gate biasing offers in situ control over quantum dot shape and position, enabling tuning of key parameters such as volume inversion, valley splitting, and spinâ orbit coupling. Furthermore, the front-end-of-line (FEOL) integration of cobalt nanomagnets into spin qubit architectures is explored to enable fast, localized EDSR driving. Thin-film characterization and micromagnetic simulations support the design of three spin qubit architectures optimized for high and low magnetic field operation, featuring Co depletion gates, wrap-gates and side-horseshoe nanomagnets. While charge noise and contact resistance in ultra-thin SOI remain challenges for future efforts to benchmark qubit operation, proof-of-concept devices demonstrate the feasibility of FD-SOI-based quantum technologies with integrated ferromagnetic components. This work provides the experimental foundation for the development of scalable, CMOS-compatible quantum devices, highlighting innovative fabrication processes and architectures tailored for the monolithic integration of FD-SOI quantum and classical processing units.