Towards 6G: Configurable High-Throughput Decoder Implementation for SC-LDPC Codes
Spatially-coupled low-density parity-check (SC-LDPC) codes are considered an important candidate for the upcoming 6G standardization, owing to their superior error-correction capability and practical decoding complexity. However, current high-throughput SC-LDPC decoders rely on unrolled architectures tailored to a certain code and thus lack the necessary rate compatibility for wireless communications. In this paper, we present a fully reconfigurable decoder architecture for SC-LDPC codes. This hardware architecture can decode virtually any SC-LDPC code that fits in the allocated memories. Based on simplified routing networks, our SC-LDPC decoder can deliver extensive code length and code rate support and achieve high throughput to satisfy the requirements of 6G.
EPFL
EPFL
École Polytechnique Fédérale de Lausanne
Eindhoven University of Technology
Université de Bretagne Sud
EPFL
2024-10-27
979-8-3503-5405-8
980
984
REVIEWED
EPFL
Event name | Event acronym | Event place | Event date |
Pacific Grove, CA, USA | 2024-10-27 - 2024-10-30 | ||