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  4. Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technology
 
conference paper

Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technology

Chalkiadaki, M.-A.  
•
Mangla, A.  
•
Enz, C. C.  
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2012
2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)
ESSDERC 2012 - 42nd European Solid State Device Research Conference
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Type
conference paper
DOI
10.1109/ESSDERC.2012.6343331
Author(s)
Chalkiadaki, M.-A.  
Mangla, A.  
Enz, C. C.  
Chauhan, Y. S.
Karim, M. A.
Venugopalan, S.
Niknejad, A.
Hu, C.
Date Issued

2012

Publisher

IEEE

Published in
2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)
Start page

50

End page

53

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSI2  
Event nameEvent placeEvent date
ESSDERC 2012 - 42nd European Solid State Device Research Conference

Bordeaux, France

17-21 09 2012

Available on Infoscience
March 27, 2013
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/90598
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