Total ionizing dose (TID) mechanisms are investigated in 28-nm MOSFETs via dc static and low-frequency noise measurements. nMOSFETs and pMOSFETs are irradiated up to 1 Grad(SiO2) and annealed at high temperatures. TID sensitivity depends on the channel length, the channel width, and the bias condition. Halo implantations improve the radiation tolerance of shorter-channel transistors. Worst case bias for TID-induced degradation is found with high electric field applied to the gate during irradiation, due to increased charge trapping in the upper corner of the shallow trench isolation (STI) and in the gate oxide. DC and low-frequency noise measurements show that, at doses up to similar to 100 Mrad(SiO2), radiation-induced degradation is primarily due to the positive charge buildup in the STI oxides. At ultrahigh doses approaching 1 Grad(SiO2), TID degradation is influenced by charge buildup in the gate oxide and traps at or near the gate/dielectric interface and/or along the STI sidewalls. Worst case degradation is found in narrower and longer-channel devices, due to the enhanced charge buildup in the STI oxide and along its interfaces.