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  4. Co-integrated Subthermionic 2D/2D WSe2/SnSe2 Vertical Tunnel FET and WSe2 MOSFET on same flake: towards a 2D/2D vdW Dual-Transport Steep Slope FET
 
conference paper

Co-integrated Subthermionic 2D/2D WSe2/SnSe2 Vertical Tunnel FET and WSe2 MOSFET on same flake: towards a 2D/2D vdW Dual-Transport Steep Slope FET

Oliva, N.  
•
Capua, L.  
•
Cavalieri, M.  
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January 1, 2019
2019 Ieee International Electron Devices Meeting (Iedm)
65th IEEE Annual International Electron Devices Meeting (IEDM)

In this work we report the fabrication, co-integration and resulting performance of 2D/2D van der Waals (vdW) Vertical p-type Tunnel FETs and p-MOSFETs in a WSe2/SnSe2 material system. We demonstrate the best ever reported combined performance in terms of subthermionic subthreshold swing (point swing less than 35 mV/dec and average swing smaller than 50 mV/dec over 1.5 decade at V-DS from 300 mV to 700mV), I-OFF < 0.1 pA/um(2), I-ON similar to 10 nA/um(2) and I-ON/T-OFF > 10(5) at V-DS=500 mV, for a 2D/2D vertical Tunnel FET. Moreover, for the first time, the fabricated Tunnel FET shows clear regions of higher performance, in same 2D material system, than the 2D MOSFET below 500 mV. NDR at room temperature in the output characteristic, with I-peak/I-valley >10, demonstrates the dominant BTBT conduction. The low hysteresis of the devices show high quality HfO2 gating with defect-free vdW gaps between the flakes. Finally, for the first time, we co-integrate on a single WSe2 flake, using 4-terminal design and a common gate, a pTunnel FET and a pMOSFET with different threshold voltages. These can operate in parallel as Dual-Transport Switch: this device shows subthermionic swing (similar to 55mV/dec point swing) of the TFET and a thermionic high on-current (similar to 100nA/um(2) at V-DS = 500mV) summing-up MOSFET and Tunnel FET currents, outperforming the individual components.

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Type
conference paper
DOI
10.1109/IEDM19573.2019.8993643
Web of Science ID

WOS:000553550000209

Author(s)
Oliva, N.  
Capua, L.  
Cavalieri, M.  
Ionescu, A. M.  
Date Issued

2019-01-01

Publisher

IEEE

Publisher place

New York

Published in
2019 Ieee International Electron Devices Meeting (Iedm)
ISBN of the book

978-1-7281-4031-5

Series title/Series vol.

IEEE International Electron Devices Meeting

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
NANOLAB  
Event nameEvent placeEvent date
65th IEEE Annual International Electron Devices Meeting (IEDM)

San Francisco, CA

Dec 09-11, 2019

Available on Infoscience
August 13, 2020
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/170809
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