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  4. Partitioning Schemes in the Lateral Asymmetric MOST
 
conference paper

Partitioning Schemes in the Lateral Asymmetric MOST

Roy, A. S.  
•
Chauhan, Y. S.
•
Enz, C. C.  
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2006
2006 European Solid-State Device Research Conference

Lateral asymmetric MOSFET, which has longitudinal doping variation in the channel, is the core of high voltage MOSFET. Recently it has been recognized that capacitance property of this kind of device is fundamentally different from conventional MOST because Ward-Dutton (WD) charge partitioning is not applicable to this kind of devices (Aarts, 2006). In this work we show the existence of a partitioning scheme for small-signal operation of the device. We also provide physical explanations of unusual behavior of C dg in lateral asymmetric MOST. The proposed theory is validated by extensive numerical and device simulation.

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Type
conference paper
DOI
10.1109/ESSDER.2006.307699
Author(s)
Roy, A. S.  
Chauhan, Y. S.
Enz, C. C.  
Sallese, J.-M.  
Ionescu, A.
Declercq, M.  
Date Issued

2006

Published in
2006 European Solid-State Device Research Conference
Start page

307

End page

310

Editorial or Peer reviewed

REVIEWED

Written at

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June 24, 2010
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/51233
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