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conference paper
Compiler Generation for Performance-Oriented Embedded DSLs (Short Paper)
January 1, 2019
Proceedings Of The 18Th Acm Sigplan International Conference On Generative Programming: Concepts And Experiences (Gpce '19)
In this paper, we present a framework for generating optimizing compilers for performance-oriented embedded DSLs (EDSLs). This framework provides facilities to automatically generate the boilerplate code required for building DSL compilers on top of the existing extensible optimizing compilers. We evaluate the practicality of our framework by demonstrating a real-world use-case successfully built with it.
Type
conference paper
Web of Science ID
WOS:000556729500010
Authors
Publication date
2019-01-01
Publisher
Published in
Proceedings Of The 18Th Acm Sigplan International Conference On Generative Programming: Concepts And Experiences (Gpce '19)
ISBN of the book
978-1-4503-6980-0
Publisher place
New York
Start page
94
End page
101
Peer reviewed
REVIEWED
EPFL units
Event name | Event place | Event date |
Athens, GREECE | Oct 21-22, 2019 | |
Available on Infoscience
August 21, 2020
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